范文编号:TX009 范文字数:13894,页数:39 摘 要:数字信号处理在科学和工程技术许多领域中得到广泛的应用,与FIR数字滤波器相比,IIR数字滤波器可以用较低的阶数获得较高的选择性,故本课题采用一种基于FPGA的IIR数字滤波器的设计方案,首先分析了IIR数字滤波器的原理及设计方法,然后通过MAX+PLUSⅡ的设计平台,采用自顶向下的模块化设计思想将整个IIR数字滤波器分为:时序控制、延时、补码乘加和累加四个功能模块。分别对各模块采用VHDL进行描述后,进行了仿真和综合。仿真结果表明,本课题所设计的IIR数字滤波器运算速度较快,系数改变灵活,有较好的参考价值。
Abstract: Digital signal processing is widely used in lots of fields, such as in science and project technique. Compared with FIR digital filter, IIR digital filter can get high selectivity with low factorial. A kind of IIR digital filter design method was introduced in the paper, which is based on FPGA. By used the design plant of MAX+PLUSⅡ, we adopt blocking method named “Top-down ” and divide the entire IIR digital filter into four blocks, which are Clock control, Time delay, Multiply-addition and Progression. After described with VHDL, we do emulate and synthesis to each block. The result shows that, the introduced IIR digital filter runs fast, and the coefficient changes agility. It has high worth for consulting.
目 录 序言 1 1 IIR数字滤波器及其硬件实现方法 2 第2章 EDA技术和可编程逻辑器件 8 第3章 IIR数字滤波器的设计与仿真结果分析 11 结束语 19 基于FPGA的IIR滤波器设计相关范文 |
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