数字频率计的设计

范文编号:ZD1470  范文字数:8042
相关范文：数字频率计 数字频率计设计 简易数字频率计 简易数字频率计的设计 简易的数字频率计 数字频率计文档设计范文
 摘   要
 在数字电路中，数字频率计属于时序电路，它主要由具有记忆功能的触发器构成。在计算机及各种数字仪表中，都得到了广泛的应用。在CMOS电路系列产品中，数字频率计是用量最大、品种很多的产品，是计算机、通讯设备、音频视频等科研生产领域不可缺少的测量仪器，并且与许多电参量的测量方案、测量结果都有十分密切的关系，因此，频率的测量就显得更为重要。本课题主要选择以集成芯片作为核心器件，设计了一个简易数字频率计，以触发器和计数器为核心，由信号输入、隔直，触发、计数、数据处理和数据显示等功能模块组成。放大整型电路：对被测信号进行预处理；闸门电路：由NE556构成一个秒信号，攫取单位时间内进入计数器的脉冲个数；时基信号：产生一个秒信号；计数器译码电路：计数译码集成在一块芯片上，计单位时间内脉冲个数，把十进制计数器计数结果译成BCD码；显示：把BCD码译码在数码管显示出来。设计中采用了模块化设计方法，采用适当的放大和整形，提高了测量频率的范围。
 
 关键词: 频率，集成电路，译码电路，计数电路，双稳态触发器
 
 
 
Abstract
      In the digital circuit, the digital cymometer is the circuit of time sequence, it is mainly formed by trigger with memory function. In the computer and various digital instruments, it is widely used . Among CMOS circuit serial products, cymometer consumption most heavy, variety a lot of product. The digital cymometer is a measuring instrument in scientific research such as computer , communication apparatus , audio and video with indispensable production field, and the measurement scheme with a lot of electric parameters , result of measuring all have a very close relation, so, the measurement of frequency seems even more important.   This subject has mainly explained that chooses integrated circuit as the key device, has designed a simple and easy digital cymometer, regard trigger and counter as core , input , separate by signal frank , touch off , count circuit , data processing , data reveal module of function make up. Enlarge the circuit of integrated type: To be carried on the preconditioning by the signal of examining; The circuit of the gate : Formed a second signal by NE556, seize the pulse number of entering the counter in unit time; The base signal of hour: Produce the signal for one second; The decipher circuit of the counter : Count deciphers and integrate on the chip together, count the pulse number in unit time, count the result of the decimal counter to translate into BCD yard; Reveal : In charge of revealing BCD one yard of deciphers in the number . Design adopt module design method, adopt appropriate enlarge and whole, have improved frequency of designing.
 Key words: frequency，Integrated circuit，Translate the coding electric circuit，Count the electric circuit，Dual Schmitt Trigger.
 
 
 
目    录
摘要  ………………………………………………………………………………………Ⅰ
Abstract  …………………………………………………………………………………Ⅱ
1  绪论  …………………………………………………………………………………1 

1.1  数字频率计的发展现状及研究概况  ……………………………………………2                  
  1.2  本课题研究背景及主要研究意义  ………………………………………………2
  1.3  本课题主要研究内容  ……………………………………………………………3

2  数字频率计的设计  ……………………………………………………………………4
  2.1  测频原理  …………………………………………………………………………4 

2.2  数字频率计组成  ………………………………………………………………4 

2.3  CPLD特点和设计流程  ……………………………………………………………5 

2.4  CPLD实验电路板  …………………………………………………………………6 

2.5  CPLD实验电路板原理和与实验箱62芯插座连接关系  ………………………7

3  设计指导  ………………………………………………………………………………10
  3.1  CPLD硬件电路设计  ………………………………………………………………10  

 3.1.1  设计任务分析和顶层设计  …………………………………………………10   

3.1.2  部分电路设计提示  …………………………………………………………11   

3.1.3  分配引脚和编译、下载  …………………………………………………13

 3.2虚拟频率计软件设计  ………………………………………………………………13   

3.2.1  虚拟频率计界面设计  ………………………………………………………13   

3.2.2  程序流程图  …………………………………………………………………14   

3.2.3  实验箱EPP接口和编程  ……………………………………………………14   

3.2.4  数据转换和显示  ……………………………………………………………15 

4  测试和调试  …………………………………………………………………………16   

4.1  调试  ……………………………………………………………………………16   

4.2  测试  ……………………………………………………………………………17
结束语  ……………………………………………………………………………………18
参考文献  …………………………………………………………………………………19

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